Oussama Sekkat

Oussama Sekkat

I was a Master’s student in Electrical Engineering at UCLA (graduated in 2010) and a member of the CORES lab directed by Professor Danijela Cabric. My research interests are in wireless communication systems design and hardware implementation, cognitive radio networks and spectrum sensing.


  • M.S., Electrical Engineering, University of California, Los Angeles – 2010
  • B.S., Electrical Engineering, University of California, Los Angeles – 2007

Research Experience

COgnitive REconfigurable Systems (CORES) Lab, UCLA

  • Graduate Student Researcher (Since January 2009)
    • Hardware implementation of wideband spectrum sensing algorithms for cognitive radio applications.

Electrical Engineering Department, UCLA

  • Teaching Assistant (January 2010-April 2010)
    • EEM16: Design of Digital Systems.

Networked and Embedded Systems Lab (NESL), UCLA

  • Intern Researcher (June 2006 – December 2006)
    • Worked on an open source Software Defined Radio project under the supervision of Professor Mani Srivastava. Studied latency and its impact on throughput in modern wireless protocols.

Adaptive Systems Lab, UCLA

  • Undergraduate Researcher (March 2006 – June 2006)
    • Tested and implemented UWB communication algorithms on two FPGA boards Xilinx Virtex 4 under the supervision of Professor Ali H. Sayed.

Electrical Engineering Department, UCLA

  • Reader (April 2006 – December 2006)
    • Corrected homework for Professor Behzad Razavi’s Circuit Design class (EE 115D), and Analog Circuits class (EE 115A).

Industry Experience

Marvell India Pvt Ltd, Bangalore, India

  • ASIC Design Verification Engineer (June 2008 – September 2008)
    • Worked with on‐site designers to validate the integration of their Visual Post Processing unit into our project.

Marvell Semiconductor, Santa Clara, CA

  • ASIC Design Verification Engineer (May 2007 – June 2008)
    • Worked within the validation team of the Video R&D group. Designing and implementing full chip and block level test benches. Was responsible for the validation of the following: DMA engine, USB controller, PCI‐E controller and the Visual Post Processing Unit. Was also responsible for all the full chip gate level simulations (working with pre/post scan netlists and post place and route netlists)


  • Tsung-Han Yu, Oussama Sekkat, Santiago Rodriguez-Parera, Dejan Markovic, Danijela Cabric, “A Low-Complexity Wideband Spectrum-Sensing Processor with Adaptive Detection Threshold and Sensing Time”, IEEE Trans. Circuits. Syst. I. Submitted in May 2010.
  • Thomas Schmid, Oussama Sekkat, Mani Srivastava . “An Experimental Study of Network Performance Impact of Increased Latency in Software Defined Radios”, in proc. WiNTECH, Sept. 2007. (pdf).

Contact Information